SANTA CLARA, Calif. — Inductance in metal interconnect will force design teams to deal with a number of new issues as the industry moves toward 90-nanometer linewidths, according to executives at OEA ...
SAN JOSE, Calif. — Parasitic on-chip inductance is looming as a new challenge as high-end ASICs push toward 0.13 micron and approach frequencies in the gigahertz range. But as IC companies begin to ...
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